Advanced computer architecture for large-scale real-time applications.

Details

• Creators:
  Wang, Gary Y.
• Corporate Creators:
  John A. Volpe National Transportation Systems Center (U.S.)
• Subject/TRT Terms:
  • Air traffic control
  • Parallel processing
  • Real time data processing
  • Information processing
• Publication/ Report Number:
  DOT-TSC-FAA-72-21 ; FAA-RD-72-101
• Resource Type:
  Tech Report
• Geographical Coverage:
  United States
• Corporate Publisher:
  United States. Department of Transportation. Federal Aviation Administration
• Abstract:
  Air traffic control automation is identified as a crucial problem which provides a complex, real-time computer application environment. A novel computer architecture in the form of a pipeline associative processor is conceived to achieve greater performance improvement over the present air traffic control system by parallel processing. This new processor is structured into a multiprocessor configuration for reliability enhancement. Problems associated with multiprocessors are identified with special emphasis on execution time anomalies and memory conflict. A direct graph model is used for analysis from which simple heuristics are established for memory allocation and dynamic task scheduling to achieve optimal performance with minimal system overhead. These schemes are simulated and the results obtained follow closely the predicted system behavior. The report includes a discussion of the GASP II simulation programming language, and the FORTRAN H-516 simulation program listings for analysis of the proposed processor. (Author)
• Format:
  PDF
• Download URL:
  https://rosap.ntl.bts.gov/view/dot/9171/dot_9171_DS1.pdf
• File Type:
  [PDF - 7.12 MB]
• Collection(s):
  Volpe Center
• Main Document Checksum:
  urn:sha-512:16181a8e8b95e9a83bee3b7f3324a0271bb446c20e087d066f7e383fc87735c4efb41e61282c791401c3d1a0d002ed58ae3049d75ad968c818fb6249762bbd79